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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2020-09-25 13:07:13 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-12-10 08:34:00 +0100 |
| commit | 043585760f5191926467862c01a0893c2fefb359 (patch) | |
| tree | 90e959546891ad1a465389f3a834b9722113144e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: renesas: r8a779a0: Make rcar_r8a779a0_cpg_clk_register() static (diff) | |
| download | wireguard-linux-043585760f5191926467862c01a0893c2fefb359.tar.xz wireguard-linux-043585760f5191926467862c01a0893c2fefb359.zip | |
MAINTAINERS: Update git repo for Renesas clock drivers
Align the clock branch name with other renesas-* branches pulled by
subsystem maintainers.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200925110713.2652-1-geert+renesas@glider.be
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions