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| author |   Subhash Jadavani <subhashj@codeaurora.org> | 2017-01-10 12:30:49 +0530 |
|---|---|---|
| committer |   Ulf Hansson <ulf.hansson@linaro.org> | 2017-02-13 13:20:30 +0100 |
| commit | 083c9aa0ad480af8a4b4b0f6be3bdca847cc211d (patch) | |
| tree | 844c76358b642126726e40d45752f9f9c62f4a00 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | mmc: sdhci-msm: Reset vendor specific func register on probe (diff) | |
| download | wireguard-linux-083c9aa0ad480af8a4b4b0f6be3bdca847cc211d.tar.xz wireguard-linux-083c9aa0ad480af8a4b4b0f6be3bdca847cc211d.zip | |
mmc: sdhci-msm: configure CORE_CSR_CDC_DELAY_CFG to recommended value
Program CORE_CSR_CDC_DELAY_CFG for hardware recommended 1.25ns delay.
We may see data CRC errors if it's programmed for any other delay
value.
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Tested-by: Jeremy McNicoll <jeremymc@redhat.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions