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| author |   Hayes Wang <hayeswang@realtek.com> | 2020-01-22 16:02:09 +0800 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2020-01-23 11:20:57 +0100 |
| commit | 08997b5eec08a2c29367f19a74abdea54b299406 (patch) | |
| tree | 581c525fb40feb146959251ea59f591b299710d2 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | r8152: disable U2P3 for RTL8153B (diff) | |
| download | wireguard-linux-08997b5eec08a2c29367f19a74abdea54b299406.tar.xz wireguard-linux-08997b5eec08a2c29367f19a74abdea54b299406.zip | |
r8152: Disable PLA MCU clock speed down
PLA MCU clock speed down could only be enabled when tx/rx are disabled.
Otherwise, the packet loss may occur.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions