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| author |   Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com> | 2024-10-28 12:30:13 -0700 |
|---|---|---|
| committer |   Matt Roper <matthew.d.roper@intel.com> | 2024-10-29 07:36:34 -0700 |
| commit | 0d94f52cece405d088849f2c42e3ffd90c197b81 (patch) | |
| tree | 8f6756b9baf5a19a25d670711f5d0d995b9677b9 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915/xe3lpd: Move async flip bit to PLANE_SURF register (diff) | |
| download | wireguard-linux-0d94f52cece405d088849f2c42e3ffd90c197b81.tar.xz wireguard-linux-0d94f52cece405d088849f2c42e3ffd90c197b81.zip | |
drm/i915/xe3: Underrun recovery does not exist post Xe2
From platforms xe3 Underrun recovery does not exist
v2: improve DISPLAY_VER checking
BSpec: 68849
Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241028193015.3241858-8-clinton.a.taylor@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions