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| author |   Paul Cercueil <paul@crapouillou.net> | 2018-07-13 16:49:09 +0200 |
|---|---|---|
| committer |   Marc Zyngier <marc.zyngier@arm.com> | 2018-07-19 16:12:27 +0100 |
| commit | 1047557cb9574a5be889bd45c1b4aa85209080e7 (patch) | |
| tree | e9cd28a9ba3d0608d09a07e5b7e86e32430ba436 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | irqchip/stm32: Add exti0 translation for stm32mp1 (diff) | |
| download | wireguard-linux-1047557cb9574a5be889bd45c1b4aa85209080e7.tar.xz wireguard-linux-1047557cb9574a5be889bd45c1b4aa85209080e7.zip | |
irqchip/ingenic: Add support for the JZ4725B SoC
The interrupt controller of the JZ4725B works the same way as the other
JZ SoCs from Ingenic; so we just add a new compatible string.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions