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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2018-04-04 13:28:47 -0500 |
|---|---|---|
| committer |   Bjorn Helgaas <helgaas@kernel.org> | 2018-04-04 13:28:47 -0500 |
| commit | 14d8d776aeda8e367a9354b6cb6a0696671630c9 (patch) | |
| tree | f52cce50460b33af1fc870c69057414e4d02159a /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge branch 'lorenzo/pci/dwc-msi' (diff) | |
| parent | misc: pci_endpoint_test: Handle 64-bit BARs properly (diff) | |
| download | wireguard-linux-14d8d776aeda8e367a9354b6cb6a0696671630c9.tar.xz wireguard-linux-14d8d776aeda8e367a9354b6cb6a0696671630c9.zip | |
Merge branch 'lorenzo/pci/endpoint'
* lorenzo/pci/endpoint:
misc: pci_endpoint_test: Handle 64-bit BARs properly
PCI: designware-ep: Make dw_pcie_ep_reset_bar() handle 64-bit BARs properly
PCI: endpoint: Make sure that BAR_5 does not have 64-bit flag set when clearing
PCI: endpoint: Make epc->ops->clear_bar()/pci_epc_clear_bar() take struct *epf_bar
PCI: endpoint: Handle 64-bit BARs properly
PCI: cadence: Set PCI_BASE_ADDRESS_MEM_TYPE_64 if a 64-bit BAR was set-up
PCI: designware-ep: Make dw_pcie_ep_set_bar() handle 64-bit BARs properly
PCI: endpoint: Setting a BAR size > 4 GB is invalid if 64-bit flag is not set
PCI: endpoint: Setting 64-bit/prefetch bit is invalid when IO is set
PCI: endpoint: Setting BAR_5 to 64-bits wide is invalid
PCI: endpoint: Simplify epc->ops->set_bar()/pci_epc_set_bar()
PCI: endpoint: BAR width should not depend on sizeof dma_addr_t
PCI: endpoint: Remove goto labels in pci_epf_create()
PCI: endpoint: Fix kernel panic after put_device()
PCI: endpoint: Simplify name allocation for EPF device
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions