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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2019-05-13 18:34:30 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-05-13 18:34:30 -0500 |
| commit | 178901bf6a7d8e6d22fb8265a8886f1ba0272fc7 (patch) | |
| tree | 99bf1c3a549db7c7044c30afcbefbb5f69ddd44f /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge branch 'pci/aer' (diff) | |
| parent | PCI: Assign bus numbers present in EA capability for bridges (diff) | |
| download | wireguard-linux-178901bf6a7d8e6d22fb8265a8886f1ba0272fc7.tar.xz wireguard-linux-178901bf6a7d8e6d22fb8265a8886f1ba0272fc7.zip | |
Merge branch 'pci/enumeration'
- Enable PCIe services for host controller drivers that use managed host
bridge alloc (Jean-Philippe Brucker)
- Add quirk to clear PCIe Retrain Link bit to work around Pericom bridge
erratum (Stefan Mätje)
- Add "external-facing" DT property to identify cases where we require
IOMMU protection from untrusted devices (Jean-Philippe Brucker)
- Support fixed bus numbers from bridge Enhanced Allocation capabilities
(Subbaraya Sundeep)
* pci/enumeration:
PCI: Assign bus numbers present in EA capability for bridges
PCI: OF: Support "external-facing" property
dt-bindings: Add "external-facing" PCIe port property
PCI: Rework pcie_retrain_link() wait loop
PCI: Work around Pericom PCIe-to-PCI bridge Retrain Link erratum
PCI: Factor out pcie_retrain_link() function
PCI: Init PCIe feature bits for managed host bridge alloc
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions