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| author |   Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2015-02-26 16:08:33 +0200 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2015-03-01 11:14:51 +0900 |
| commit | 1fc580158714b19fbc3a592a126c58e06728763d (patch) | |
| tree | 830442b40cddcfc66120d6a2567bd334e9d4c108 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: shmobile: lager: Add DU external pixel clocks to DT (diff) | |
| download | wireguard-linux-1fc580158714b19fbc3a592a126c58e06728763d.tar.xz wireguard-linux-1fc580158714b19fbc3a592a126c58e06728763d.zip | |
ARM: shmobile: r8a7794: alt: Fix ethernet controller PHY IRQ line
The PHY IRQ line is connected to external IRQ8, not IRQ0. Fix DT
accordingly.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions