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| author |   Sunil V L <sunilvl@ventanamicro.com> | 2023-05-15 11:19:25 +0530 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@rivosinc.com> | 2023-06-01 08:45:12 -0700 |
| commit | 21f4f92410dc302b43c6c8307191704ba93c748d (patch) | |
| tree | 11e144ff8e51a6445280837d3e1b9ebd602c2210 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clocksource/timer-riscv: Refactor riscv_timer_init_dt() (diff) | |
| download | wireguard-linux-21f4f92410dc302b43c6c8307191704ba93c748d.tar.xz wireguard-linux-21f4f92410dc302b43c6c8307191704ba93c748d.zip | |
clocksource/timer-riscv: Add ACPI support
Initialize the timer driver based on RHCT table on ACPI based
platforms.
Currently, ACPI doesn't support a flag to indicate that the
timer interrupt can wake up the cpu irrespective of its
power state. It will be added in future update.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230515054928.2079268-19-sunilvl@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions