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| author |   Luca Ceresoli <luca@lucaceresoli.net> | 2020-06-11 23:11:42 +0200 |
|---|---|---|
| committer |   Moritz Fischer <mdf@kernel.org> | 2020-06-18 18:19:44 -0700 |
| commit | 23f872b6ece695750667a44016037154b91addef (patch) | |
| tree | 105b078df4eae4151422eb144473175660831c9b /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | fpga manager: xilinx-spi: valid for the 7 Series too (diff) | |
| download | wireguard-linux-23f872b6ece695750667a44016037154b91addef.tar.xz wireguard-linux-23f872b6ece695750667a44016037154b91addef.zip | |
fpga manager: xilinx-spi: remove unneeded, mistyped variables
Using variables does not add readability here: parameters passed
to udelay*() are obviously in microseconds and their meaning is clear
from the context.
The type is also wrong, udelay expects an unsigned long.
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions