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| author |   Adrian Hunter <adrian.hunter@intel.com> | 2020-08-27 10:20:30 +0300 |
|---|---|---|
| committer |   Martin K. Petersen <martin.petersen@oracle.com> | 2020-09-15 16:11:47 -0400 |
| commit | 247f994459383a15486b6a78b669b6fc088c7543 (patch) | |
| tree | 41c8475529aae5532a8590ca6f80f873bb63591e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge branch '5.9/scsi-fixes' into 5.10/scsi-ufs (diff) | |
| download | wireguard-linux-247f994459383a15486b6a78b669b6fc088c7543.tar.xz wireguard-linux-247f994459383a15486b6a78b669b6fc088c7543.zip | |
scsi: ufs-pci: Add LTR support for Intel controllers
Intel host controllers support the setting of latency tolerance.
Accordingly, implement the PM QoS ->set_latency_tolerance() callback. The
raw register values are also exposed via debugfs.
Link: https://lore.kernel.org/r/20200827072030.24655-1-adrian.hunter@intel.com
Fixes: 8c09d7527697 ("scsi: ufshdc-pci: Add Intel PCI IDs for EHL")
Fixes: 1ab27c9cf8b6 ("ufs: Add support for clock gating")
Reviewed-by: Avri Altman <avri.altman@wdc.com>
Acked-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions