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authorJagan Teki <jagan@amarulasolutions.com>2021-02-28 21:13:22 +0530
committerAlexandre Torgue <alexandre.torgue@foss.st.com>2021-03-11 12:06:23 +0100
commit2533c9565d2d751654ec0d0fb27818f0f2ed1ac2 (patch)
tree27afe18547586bcbe45082dc2764a405bb19bc07 /tools/perf/scripts/python/export-to-postgresql.py
parentARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 (diff)
downloadwireguard-linux-2533c9565d2d751654ec0d0fb27818f0f2ed1ac2.tar.xz
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dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. i.Core STM32MP1 needs to mount on top of this Evaluation board for creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit. Add bindings for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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