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| author |   Pagadala Yesu Anjaneyulu <pagadala.yesu.anjaneyulu@intel.com> | 2025-05-09 13:44:51 +0300 |
|---|---|---|
| committer |   Miri Korenblit <miriam.rachel.korenblit@intel.com> | 2025-05-10 21:43:04 +0300 |
| commit | 2903fe335e255965e576642dde9e674483617d1b (patch) | |
| tree | 74153bcf5096f23683d57e7bd24f24c324e0c3e9 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | wifi: iwlwifi: mld: move aux_sta member from iwl_mld_link to iwl_mld_vif (diff) | |
| download | wireguard-linux-2903fe335e255965e576642dde9e674483617d1b.tar.xz wireguard-linux-2903fe335e255965e576642dde9e674483617d1b.zip | |
wifi: iwlwifi: mld: Block EMLSR only when ready to enter ROC
If one of the stages in starting a ROC failed,
the ROC will not start nor end so EMLSR will stay blocked forever.
Block EMLSR once all ROC conditions are validated and
clear EMLSR blocked reasons in mld_vif cleanup.
Signed-off-by: Pagadala Yesu Anjaneyulu <pagadala.yesu.anjaneyulu@intel.com>
Link: https://patch.msgid.link/20250509104454.2582160-13-miriam.rachel.korenblit@intel.com
Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions