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| author |   Sam Protsenko <semen.protsenko@linaro.org> | 2021-10-08 18:43:50 +0300 |
|---|---|---|
| committer |   Sylwester Nawrocki <s.nawrocki@samsung.com> | 2021-10-09 22:21:14 +0200 |
| commit | 2ae5c2c3f8d586b709cf67efe94488be397d7544 (patch) | |
| tree | b286dcf59abca13b0fc057668527a902c1a73723 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: samsung: clk-pll: Implement pll0831x PLL type (diff) | |
| download | wireguard-linux-2ae5c2c3f8d586b709cf67efe94488be397d7544.tar.xz wireguard-linux-2ae5c2c3f8d586b709cf67efe94488be397d7544.zip | |
dt-bindings: clock: Add bindings definitions for Exynos850 CMU
Clock controller driver is designed to have separate instances for each
particular CMU. So clock IDs in this bindings header also start from 1
for each CMU.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211008154352.19519-4-semen.protsenko@linaro.org
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions