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| author |   Richard Gong <richard.gong@intel.com> | 2020-02-14 10:00:46 -0600 |
|---|---|---|
| committer |   Moritz Fischer <mdf@kernel.org> | 2020-04-29 20:37:09 -0700 |
| commit | 2e00dd1bd6567148c331469c60ded9715ac749c7 (patch) | |
| tree | eedc795ff2de483c6f1985482a7b7cd2bfad3d81 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | fpga: machxo2-spi: Use new structure for SPI transfer delays (diff) | |
| download | wireguard-linux-2e00dd1bd6567148c331469c60ded9715ac749c7.tar.xz wireguard-linux-2e00dd1bd6567148c331469c60ded9715ac749c7.zip | |
dt-bindings: fpga: add compatible value to Stratix10 SoC FPGA manager binding
Add a compatible property value to Stratix10 SoC FPGA manager binding file
Signed-off-by: Richard Gong <richard.gong@intel.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions