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| author |   Sowjanya Komatineni <skomatineni@nvidia.com> | 2020-05-04 19:31:53 -0700 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2020-05-20 15:26:10 +0200 |
| commit | 2eb8e1a4b1dad1331e438923fefd56a7d6ca6488 (patch) | |
| tree | 82a10d0281348f79c187a46f813e84f07dedb2d9 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: tegra: Fix SOR powergate clocks and reset (diff) | |
| download | wireguard-linux-2eb8e1a4b1dad1331e438923fefd56a7d6ca6488.tar.xz wireguard-linux-2eb8e1a4b1dad1331e438923fefd56a7d6ca6488.zip | |
arm64: tegra: Add reset-cells to memory controller
Tegra210 device tree is missing reset-cells property for the memory
controller node. This patch adds it.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions