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| author |   Chanho Park <chanho61.park@samsung.com> | 2021-10-12 09:23:13 +0900 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | 2021-10-12 14:20:44 +0200 |
| commit | 31bbac5263aa63dfc8bfed2180bb6a5a3c531681 (patch) | |
| tree | d92ffedaf58b21c13235efe7703d96688c689464 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: exynos: add proper comaptible FSYS syscon in Exynos5433 (diff) | |
| download | wireguard-linux-31bbac5263aa63dfc8bfed2180bb6a5a3c531681.tar.xz wireguard-linux-31bbac5263aa63dfc8bfed2180bb6a5a3c531681.zip | |
arm64: dts: exynos: add initial support for exynosautov9 SoC
Add minimal support for ExynosAuto v9 SoC[1].
- Enumarate all pinctrl nodes
- UART with exynos850 compatible
- UFS0 HCI + Phy
Like exynos850, this also uses fixed-rate clock nodes until clock driver
has been supported. The clock nodes are initialized on bootloader stage
thus we don't need to control them so far.
[1]: https://www.samsung.com/semiconductor/minisite/exynos/products/automotiveprocessor/exynos-auto-v9/
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20211012002314.38965-3-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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