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| author |   Biju Das <biju.das.jz@bp.renesas.com> | 2021-09-22 16:51:44 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2021-09-24 15:11:05 +0200 |
| commit | 32897e6fff196a5de4981030466ae391dfe56c7b (patch) | |
| tree | eb20f75de0e391ec47e7d16143910ea6f56e1ff5 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: renesas: r9a07g044: Add ethernet clock sources (diff) | |
| download | wireguard-linux-32897e6fff196a5de4981030466ae391dfe56c7b.tar.xz wireguard-linux-32897e6fff196a5de4981030466ae391dfe56c7b.zip | |
clk: renesas: rzg2l: Add support to handle coupled clocks
The AXI and CHI clocks use the same register bit for controlling clock
output. Add a new clock type for coupled clocks, which sets the
CPG_CLKON_ETH.CLK[01]_ON bit when at least one clock is enabled, and
clears the bit only when both clocks are disabled.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210922155145.28156-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions