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| author |   Macpaul Lin <macpaul.lin@mediatek.com> | 2025-02-20 22:22:30 +0800 |
|---|---|---|
| committer |   AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2025-02-25 10:00:02 +0100 |
| commit | 3aeff53c57c86981f9920e4d5ae7d00b7d62a671 (patch) | |
| tree | b4701cc85061365adb8d873352dd6e7084c58390 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: mediatek: mt8390-genio-common: Fix duplicated regulator name (diff) | |
| download | wireguard-linux-3aeff53c57c86981f9920e4d5ae7d00b7d62a671.tar.xz wireguard-linux-3aeff53c57c86981f9920e4d5ae7d00b7d62a671.zip | |
dt-bindings: usb: mtu3: Add ports property
Define the ports property in the mediatek,mtu3 device tree binding schema.
Include definitions for port@0 and port@1, specifying their roles as
High Speed (HS) and Super Speed (SS) data buses, respectively.
Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Link: https://lore.kernel.org/r/20250220142230.2530583-1-macpaul.lin@mediatek.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions