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| author |   Gregory CLEMENT <gregory.clement@free-electrons.com> | 2017-07-12 13:22:29 +0200 |
|---|---|---|
| committer |   Linus Walleij <linus.walleij@linaro.org> | 2017-08-14 15:00:43 +0200 |
| commit | 3f13b6a24f192da3096389b82202f16eff2c11ee (patch) | |
| tree | d5ec94e1f9b0b1274dc4109dcd22badfb189e9da /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | gpio: reject invalid gpio before getting gpio_desc (diff) | |
| download | wireguard-linux-3f13b6a24f192da3096389b82202f16eff2c11ee.tar.xz wireguard-linux-3f13b6a24f192da3096389b82202f16eff2c11ee.zip | |
gpio: mvebu: Fix cause computation in irq handler
When switching to regmap, the way to compute the irq cause was
reorganized. However while doing it, a typo was introduced: a 'xor'
replaced a 'and'.
This lead to wrong behavior in the interrupt handler ans one of the
symptom was wrong irq handler called on the Armada 388 GP:
"->handle_irq(): c016303c,
handle_bad_irq+0x0/0x278
->irq_data.chip(): c0b0ec0c,
0xc0b0ec0c
->action(): (null)
IRQ_NOPROBE set
IRQ_NOREQUEST set
unexpected IRQ trap at vector 00
irq 0, desc: ee804800, depth: 1, count: 0, unhandled: 0"
Fixes: 2233bf7a92e7 ("gpio: mvebu: switch to regmap for register access")
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions