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| author |   Marek Vasut <marex@denx.de> | 2024-11-06 00:40:41 +0100 |
|---|---|---|
| committer |   Alexandre Torgue <alexandre.torgue@foss.st.com> | 2024-12-09 18:38:08 +0100 |
| commit | 41e12cebd9c39c9ef7b6686f2c4e8bc451a386fc (patch) | |
| tree | 22c468b6b6990399a2beb7c7d6f780e467c1758d /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: dts: stm32: Increase CPU core voltage on STM32MP13xx DHCOR SoM (diff) | |
| download | wireguard-linux-41e12cebd9c39c9ef7b6686f2c4e8bc451a386fc.tar.xz wireguard-linux-41e12cebd9c39c9ef7b6686f2c4e8bc451a386fc.zip | |
ARM: dts: stm32: Sort M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT
Move the M24256E write-lockable page subnode after RTC subnode in
DH STM32MP13xx DHCOR SoM DT to keep the list of nodes sorted by I2C
address. No functional change.
Fixes: 3f2e7d167307 ("ARM: dts: stm32: Describe M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions