diff options
| author |   Yongqiang Niu <yongqiang.niu@mediatek.com> | 2019-03-27 14:19:20 +0800 |
|---|---|---|
| committer |   CK Hu <ck.hu@mediatek.com> | 2019-05-29 14:55:26 +0800 |
| commit | 46a3b9fce29386704a56fbfb22e0dcdbd813b4b5 (patch) | |
| tree | 77bd3528a8f23acda757c66c4abd4d1f79c957e6 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/mediatek: adjust ddp clock control flow (diff) | |
| download | wireguard-linux-46a3b9fce29386704a56fbfb22e0dcdbd813b4b5.tar.xz wireguard-linux-46a3b9fce29386704a56fbfb22e0dcdbd813b4b5.zip | |
drm/mediatek: respect page offset for PRIME mmap calls
Respect page offset for PRIME mmap calls
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions