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author | 2020-12-10 12:06:44 +0100 | |
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committer | 2020-12-14 17:25:03 -0800 | |
commit | 49506a9ba0619b02bcce039e19dc40b432f56b15 (patch) | |
tree | 6876e7e5c4a465fc578e2b299c978c8ee922ac9e /tools/perf/scripts/python/export-to-postgresql.py | |
parent | net: openvswitch: fix TTL decrement exception action execution (diff) | |
download | wireguard-linux-49506a9ba0619b02bcce039e19dc40b432f56b15.tar.xz wireguard-linux-49506a9ba0619b02bcce039e19dc40b432f56b15.zip |
net: dsa: mv88e6xxx: don't set non-existing learn2all bit for 6220/6250
The 6220 and 6250 switches do not have a learn2all bit in global1, ATU
control register; bit 3 is reserverd.
On the switches that do have that bit, it is used to control whether
learning frames are sent out the ports that have the message_port bit
set. So rather than adding yet another chip method, use the existence
of the ->port_setup_message_port method as a proxy for determining
whether the learn2all bit exists (and should be set).
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Link: https://lore.kernel.org/r/20201210110645.27765-1-rasmus.villemoes@prevas.dk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions