diff options
| author |   Chen-Yu Tsai <wens@csie.org> | 2017-08-03 16:14:07 +0800 |
|---|---|---|
| committer |   Kishon Vijay Abraham I <kishon@ti.com> | 2017-08-22 10:11:18 +0530 |
| commit | 4b63743cdb47281466cd591ce7a2ae2512b23078 (patch) | |
| tree | 5fd5c7ca0ffa61673668ceca02ca895764454b2d /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | phy: sun4i-usb: Support secondary clock for HSIC PHY (diff) | |
| download | wireguard-linux-4b63743cdb47281466cd591ce7a2ae2512b23078.tar.xz wireguard-linux-4b63743cdb47281466cd591ce7a2ae2512b23078.zip | |
phy: sun4i-usb: Support A83T USB PHYs
The A83T has 3 USB PHYs, 1 for OTG, 1 for standard USB, 1 for USB HSIC.
The phy initialization procedure is very different from other SoCs, but
the PMU bits are the same, with additional bits for HSIC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions