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authorSunil V L <sunilvl@ventanamicro.com>2023-05-15 11:19:11 +0530
committerPalmer Dabbelt <palmer@rivosinc.com>2023-06-01 08:44:59 -0700
commit4d02d88d2b922807307a3574a7b401dcccb870d1 (patch)
treef0a2ddec9fee8dea62ad8b51d9ea7c21ef415e71 /tools/perf/scripts/python/export-to-postgresql.py
parentcrypto: hisilicon/qm: Fix to enable build with RISC-V clang (diff)
downloadwireguard-linux-4d02d88d2b922807307a3574a7b401dcccb870d1.tar.xz
wireguard-linux-4d02d88d2b922807307a3574a7b401dcccb870d1.zip
ACPI: tables: Print RINTC information when MADT is parsed
When MADT is parsed, print RINTC information as below: ACPI: RISC-V INTC (acpi_uid[0x0000] hart_id[0x0] enabled) ACPI: RISC-V INTC (acpi_uid[0x0001] hart_id[0x1] enabled) ... ACPI: RISC-V INTC (acpi_uid[0x000f] hart_id[0xf] enabled) This debug information will be very helpful during bring up. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20230515054928.2079268-5-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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