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| author |   Xing Zheng <zhengxing@rock-chips.com> | 2015-11-05 15:33:58 +0800 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2015-11-23 21:59:19 +0100 |
| commit | 5190c08b29899131a183ea5802b9397918cca1ae (patch) | |
| tree | 3a052d259e110217fd4ef284395cfd28e68eb46e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: rockchip: add new pll-type for rk3036 and similar socs (diff) | |
| download | wireguard-linux-5190c08b29899131a183ea5802b9397918cca1ae.tar.xz wireguard-linux-5190c08b29899131a183ea5802b9397918cca1ae.zip | |
clk: rockchip: add clock controller for rk3036
Add the clock tree definition for the new rk3036 SoC.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions