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| author |   André Draszik <andre.draszik@linaro.org> | 2024-12-03 12:40:25 +0000 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-12-09 20:24:54 +0100 |
| commit | 527c9640e4f04044afa98f3ce18f8af89ac4a322 (patch) | |
| tree | 68e7629253873624a860fe497114995a6699ef2a /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | MAINTAINERS: add myself and Tudor as reviewers for Google Tensor SoC (diff) | |
| download | wireguard-linux-527c9640e4f04044afa98f3ce18f8af89ac4a322.tar.xz wireguard-linux-527c9640e4f04044afa98f3ce18f8af89ac4a322.zip | |
arm64: dts: exynos: gs101: phy region for exynos5-usbdrd is larger
Turns out there are some additional registers in the phy region, update
the DT accordingly.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Tested-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20241203-gs101-phy-lanes-orientation-dts-v2-2-1412783a6b01@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions