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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2021-03-26 13:00:55 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-05-11 09:57:06 +0200 |
| commit | 58effcd350c81735154313aa49b1c0801fdb04a2 (patch) | |
| tree | 2d9e4228c6de8a57261a5292f05cc6f80f3d7795 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: renesas: rcar-gen3: Update Z clock rate formula in comments (diff) | |
| download | wireguard-linux-58effcd350c81735154313aa49b1c0801fdb04a2.tar.xz wireguard-linux-58effcd350c81735154313aa49b1c0801fdb04a2.zip | |
clk: renesas: rcar-gen3: Make cpg_z_clk.mask u32
cpg_z_clk.mask contains a mask for a 32-bit register.
Hence its size can be reduced from unsigned long to u32.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210326120100.1577596-3-geert+renesas@glider.be
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions