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| author |   Joakim Zhang <qiangqing.zhang@nxp.com> | 2020-10-20 23:53:57 +0800 |
|---|---|---|
| committer |   Marc Kleine-Budde <mkl@pengutronix.de> | 2020-11-03 22:30:33 +0100 |
| commit | 5fdf04a9fdc27fc6cd37bb2ae44a84a282323773 (patch) | |
| tree | 4ce31bf3c3386b3684408f6d35a5e433b4aff340 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | can: flexcan: add ECC initialization for LX2160A (diff) | |
| download | wireguard-linux-5fdf04a9fdc27fc6cd37bb2ae44a84a282323773.tar.xz wireguard-linux-5fdf04a9fdc27fc6cd37bb2ae44a84a282323773.zip | |
can: flexcan: add ECC initialization for VF610
For SoCs with ECC supported, even use FLEXCAN_QUIRK_DISABLE_MECR quirk to
disable non-correctable errors interrupt and freeze mode, had better use
FLEXCAN_QUIRK_SUPPORT_ECC quirk to initialize all memory.
Fixes: cdce844865bea ("can: flexcan: add vf610 support for FlexCAN")
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Link: https://lore.kernel.org/r/20201020155402.30318-6-qiangqing.zhang@nxp.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions