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| author |   Shawn Guo <shawnguo@kernel.org> | 2015-10-19 22:45:01 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2015-10-19 22:45:01 +0800 |
| commit | 62b91605c8e87246e3e355697deacb199228a81e (patch) | |
| tree | a161d5d1d3fe98a43045857e906cc45ab2257666 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Linux 4.3-rc1 (diff) | |
| parent | clk: imx6: Add SPDIF_GCLK clock in clock tree (diff) | |
| download | wireguard-linux-62b91605c8e87246e3e355697deacb199228a81e.tar.xz wireguard-linux-62b91605c8e87246e3e355697deacb199228a81e.zip | |
Merge tag 'imx-clk-4.4' into imx/dt
The i.MX clock updates for 4.4:
- A couple of fixes on i.MX31 and i.MX35 clock initialization functions
which makes mxc_timer_init() currently be called twice for DT boot.
- Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal
design target.
- Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for
Vybrid, and SPDIF_GCLK for i.MX6.
- A series from Lucas to fix early debug UART clock setup. This is
currently a one-off fix for i.MX platform, and can be extended to
become a generic solution later.
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions