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| author |   Alexandru Ardelean <alexandru.ardelean@analog.com> | 2019-03-26 16:05:20 +0200 |
|---|---|---|
| committer |   Vinod Koul <vkoul@kernel.org> | 2019-04-24 11:08:38 +0530 |
| commit | 648865a79d8ee3d1aa64aab5eb2a9d12eeed14f9 (patch) | |
| tree | e14223fdd23d34867944778dd829d4afdaaa5dbc /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dmaengine: axi-dmac: Infer synthesis configuration parameters hardware (diff) | |
| download | wireguard-linux-648865a79d8ee3d1aa64aab5eb2a9d12eeed14f9.tar.xz wireguard-linux-648865a79d8ee3d1aa64aab5eb2a9d12eeed14f9.zip | |
dmaengine: axi-dmac: Don't check the number of frames for alignment
In 2D transfers (for the AXI DMAC), the number of frames (numf) represents
Y_LENGTH, and the length of a frame is X_LENGTH. 2D transfers are useful
for video transfers where screen resolutions ( X * Y ) are typically
aligned for X, but not for Y.
There is no requirement for Y_LENGTH to be aligned to the bus-width (or
anything), and this is also true for AXI DMAC.
Checking the Y_LENGTH for alignment causes false errors when initiating DMA
transfers. This change fixes this by checking only that the Y_LENGTH is
non-zero.
Fixes: 0e3b67b348b8 ("dmaengine: Add support for the Analog Devices AXI-DMAC DMA controller")
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions