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| author |   stu.hsieh@mediatek.com <stu.hsieh@mediatek.com> | 2018-06-20 16:19:12 +0800 |
|---|---|---|
| committer |   CK Hu <ck.hu@mediatek.com> | 2018-06-24 12:03:57 +0800 |
| commit | 6de614026234f900ee55afb8dc8ea5f07b7509cd (patch) | |
| tree | a8138e968a2a40823e0552771ac36a4e8bf64535 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/mediatek: add component DSI3 (diff) | |
| download | wireguard-linux-6de614026234f900ee55afb8dc8ea5f07b7509cd.tar.xz wireguard-linux-6de614026234f900ee55afb8dc8ea5f07b7509cd.zip | |
drm/mediatek: add the DSI1 for component init condition
This patch add the DSI1 for component init condition
Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions