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| author |   Matthias Kaehlcke <mka@chromium.org> | 2019-08-01 15:03:54 -0700 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2019-08-03 00:33:59 +0200 |
| commit | 6f79fcc6c9e311d489989e0909d86c0762d3ac61 (patch) | |
| tree | 5be4d27cc275086b2cb4e1573e7ca92e070d4ee1 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: dts: rockchip: A few fixes for veyron-{fievel,tiger} (diff) | |
| download | wireguard-linux-6f79fcc6c9e311d489989e0909d86c0762d3ac61.tar.xz wireguard-linux-6f79fcc6c9e311d489989e0909d86c0762d3ac61.zip | |
ARM: dts: rockchip: Add pin names for rk3288-veyron fievel
This is like commit 0ca87bd5baa6 ("ARM: dts: rockchip: Add pin names
for rk3288-veyron-jerry") and other similar commits, but for the
veyron fievel board (and tiger, which includes the fievel .dtsi).
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions