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| author |   Joakim Zhang <qiangqing.zhang@nxp.com> | 2021-07-19 15:18:21 +0800 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2021-07-19 10:07:01 -0700 |
| commit | 77e5253deadf7fae59207330e3a639e592ee7892 (patch) | |
| tree | 1bf4d659b4b91faf6f6ec630eec7f764ebe42481 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: net: imx-dwmac: convert imx-dwmac bindings to yaml (diff) | |
| download | wireguard-linux-77e5253deadf7fae59207330e3a639e592ee7892.tar.xz wireguard-linux-77e5253deadf7fae59207330e3a639e592ee7892.zip | |
arm64: dts: imx8mp: change interrupt order per dt-binding
This patch changs interrupt order which found by dtbs_check.
$ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml
arch/arm64/boot/dts/freescale/imx8mp-evk.dt.yaml: ethernet@30bf0000: interrupt-names:0: 'macirq' was expected
arch/arm64/boot/dts/freescale/imx8mp-evk.dt.yaml: ethernet@30bf0000: interrupt-names:1: 'eth_wake_irq' was expected
According to Documentation/devicetree/bindings/net/snps,dwmac.yaml, we
should list interrupt in it's order.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions