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| author |   José Roberto de Souza <jose.souza@intel.com> | 2021-04-17 17:21:22 -0700 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2021-05-11 12:28:51 -0700 |
| commit | 78b772e1a01f699fbbcaa59d7a298aabe66a9b21 (patch) | |
| tree | a7d40a07287aacc87cab77dba3bbc1d631c8f9e5 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915/display: Use YCbCr420 as fallback when RGB fails (diff) | |
| download | wireguard-linux-78b772e1a01f699fbbcaa59d7a298aabe66a9b21.tar.xz wireguard-linux-78b772e1a01f699fbbcaa59d7a298aabe66a9b21.zip | |
drm/i915/display: Fill PSR state during hardware configuration read out
So far if we had a mismatch between the state asked and what was
programmed in hardware for PSR, this mismatch would go unnoticed.
So here adding the PSR to the hardware configuration readout,
EDP_PSR_CTL and EDP_PSR2_CTL can't be directly read because its state
flips due to other factors like frontbuffer modifications and CRC.
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210418002126.87882-1-jose.souza@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions