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| author |   Vignesh Raghavendra <vigneshr@ti.com> | 2021-03-04 23:10:38 +0200 |
|---|---|---|
| committer |   Nishanth Menon <nm@ti.com> | 2021-03-09 08:46:41 -0600 |
| commit | 7fe968d200436980708c893d87601ffac7d4cb7f (patch) | |
| tree | 8b87c5d0f916c922fd2d0b6032fb018792260ded /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: ti: k3-am642-evm: add CPSW3g DT nodes (diff) | |
| download | wireguard-linux-7fe968d200436980708c893d87601ffac7d4cb7f.tar.xz wireguard-linux-7fe968d200436980708c893d87601ffac7d4cb7f.zip | |
arm64: dts: ti: k3-am642-sk: Add CPSW DT nodes
AM642 SK board has 2 CPSW3g ports connected through TI DP83867 PHYs. Add DT
entries for the same.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210304211038.12511-5-grygorii.strashko@ti.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions