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| author |   Wolfram Sang <wsa+renesas@sang-engineering.com> | 2017-07-19 10:27:54 +0200 |
|---|---|---|
| committer |   Wim Van Sebroeck <wim@iguana.be> | 2017-09-09 20:23:19 +0200 |
| commit | 82f64cd20848511f516bd28147a6432497dfb080 (patch) | |
| tree | a0abd69e25cd929b51310197b16c7db552cc7d5e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | watchdog: renesas_wdt: don't round closest with get_timeleft (diff) | |
| download | wireguard-linux-82f64cd20848511f516bd28147a6432497dfb080.tar.xz wireguard-linux-82f64cd20848511f516bd28147a6432497dfb080.zip | |
watchdog: renesas_wdt: apply better precision
The error margin of the clks_per_second variable was too large and
caused offsets when used with clock frequencies which left a remainder
after applying the dividers. Now we always calculate directly using the
clock rate and the divider using some helper macros. That also means
that DIV_ROUND_UP moves from probe to the multiplication macro. In
probe, we don't need to ensure anymore that 'clks_per_sec' would go too
fast but rather ensure that the lower limit is really at least 1 to
certainly get a full cycle.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions