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| author |   Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2024-12-10 19:09:49 +0200 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2024-12-13 11:21:20 +0100 |
| commit | 880f6c84701cb7735d19f20db89e757086a8fcfa (patch) | |
| tree | 9e58e035bf27afd1be12cca89f20e6c1be0abb83 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: renesas: rzg3s-smarc-som: Enable ADC (diff) | |
| download | wireguard-linux-880f6c84701cb7735d19f20db89e757086a8fcfa.tar.xz wireguard-linux-880f6c84701cb7735d19f20db89e757086a8fcfa.zip | |
arm64: dts: renesas: r9a08g045: Add SSI nodes
Add DT nodes for the SSI IPs available on the Renesas RZ/G3S SoC. Along
with it external audio clocks were added. Board device tree could use it
and update the frequencies.
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241210170953.2936724-21-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions