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authorDave Gerlach <d-gerlach@ti.com>2021-02-26 08:42:55 -0600
committerNishanth Menon <nm@ti.com>2021-03-09 08:28:58 -0600
commit8abae9389bdbf047ffb5190efc6fddc509536f3a (patch)
treeb8ce192ee2b21e0ea7ef4f556003b3aa0063b519 /tools/perf/scripts/python/export-to-postgresql.py
parentdt-bindings: pinctrl: k3: Introduce pinmux definitions for AM64 (diff)
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arm64: dts: ti: Add support for AM642 SoC
The AM642 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable applications such as Motor Drives, PLC, Remote IO and IoT Gateways. Some highlights of this SoC are: * Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F MCUs, and a single Cortex-M4F. * Two Gigabit Industrial Communication Subsystems (ICSSG). * Integrated Ethernet switch supporting up to a total of two external ports. * PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other peripherals. * Centralized System Controller for Security, Power, and Resource Management (DMSC). See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 Introduce basic support for the AM642 SoC to enable ramdisk or MMC boot. Introduce the sdhci, i2c, spi, and uart MAIN domain periperhals under cbass_main and the i2c, spi, and uart MCU domain periperhals under cbass_mcu. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20210226144257.5470-4-d-gerlach@ti.com
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