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| author |   Seiya Wang <seiya.wang@mediatek.com> | 2021-03-19 10:34:21 +0800 |
|---|---|---|
| committer |   Matthias Brugger <matthias.bgg@gmail.com> | 2021-03-29 13:52:02 +0200 |
| commit | 8c7713c00488bf3ac067db3e9a203e8d1ef3613b (patch) | |
| tree | 4886feef63e1d616fa83700743955b7cbb02d65d /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: timer: Add compatible for Mediatek MT8195 (diff) | |
| download | wireguard-linux-8c7713c00488bf3ac067db3e9a203e8d1ef3613b.tar.xz wireguard-linux-8c7713c00488bf3ac067db3e9a203e8d1ef3613b.zip | |
dt-bindings: serial: Add compatible for Mediatek MT8195
This commit adds dt-binding documentation of uart for Mediatek MT8195 SoC
Platform.
Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Link: https://lore.kernel.org/r/20210319023427.16711-4-seiya.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions