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author | 2019-02-18 16:10:32 +0000 | |
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committer | 2019-02-18 17:41:16 +0000 | |
commit | 90f6e68031397fb6212bef5619193cd15707fa0f (patch) | |
tree | 819824fabbdf3b11bcf9277e7bbd5cb9309005a6 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | ASoC: codecs: ad193x: Set constraint to always have 32 sample bits (diff) | |
download | wireguard-linux-90f6e68031397fb6212bef5619193cd15707fa0f.tar.xz wireguard-linux-90f6e68031397fb6212bef5619193cd15707fa0f.zip |
ASoC: codecs: ad193x: Fix frame polarity for DSP_A format
By default, the codec starts to interpret the left (first) channel on
the falling edge (low polarity) of LRCLK. However, for DSP_A, the left
channel needs to start on the rising edge of LRCLK. This patch fixes
this channel swap by toggling the bit which selects the LRCLK polarity.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions