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author | 2021-01-27 17:24:48 +0000 | |
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committer | 2021-01-28 11:19:47 +0100 | |
commit | 9117d0c975b8e1596320c9f21f8ba9b9ecc79cbd (patch) | |
tree | 3fa3a1e773f0683111eb32c9eaced68e56b16afc /tools/perf/scripts/python/export-to-postgresql.py | |
parent | dt-bindings: sram: sunxi-sram: Add H616 compatible string (diff) | |
download | wireguard-linux-9117d0c975b8e1596320c9f21f8ba9b9ecc79cbd.tar.xz wireguard-linux-9117d0c975b8e1596320c9f21f8ba9b9ecc79cbd.zip |
soc: sunxi: sram: Add support for more than one EMAC clock
The Allwinner H616 adds a second EMAC clock register at offset 0x34, for
controlling the second EMAC in this chip.
Allow to extend the regmap in this case, to cover more than the current
4 bytes exported.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210127172500.13356-9-andre.przywara@arm.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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