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| author |   Christophe Leroy <christophe.leroy@c-s.fr> | 2016-02-03 23:34:21 +0100 |
|---|---|---|
| committer |   Scott Wood <oss@buserror.net> | 2016-03-09 10:44:17 -0600 |
| commit | 921fff351c3a7d2895f22d4a7a36b2f667709b9c (patch) | |
| tree | c2065fdb41a6fba6ca686bc4a34bf6e12f476302 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | powerpc/885: set SDCR to 0x40 (diff) | |
| download | wireguard-linux-921fff351c3a7d2895f22d4a7a36b2f667709b9c.tar.xz wireguard-linux-921fff351c3a7d2895f22d4a7a36b2f667709b9c.zip | |
powerpc/8xx: CONFIG_DEBUG_PAGEALLOC requires ITLBmiss for kernel addresses
When CONFIG_DEBUG_PAGEALLOC is activated, the initial TLB mapping gets
flushed to track accesses to wrong areas. Therefore, kernel addresses
will also generate ITLB misses.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions