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authorJanne Grunau <j@jannau.net>2023-03-07 13:10:11 +0100
committerHector Martin <marcan@marcan.st>2023-03-28 19:39:05 +0900
commit93b415b2e164348bf29fb89b77a3d9585bab76a5 (patch)
treee879b0910ff9e601a27be8074eafd43c3e217c5e /tools/perf/scripts/python/export-to-postgresql.py
parentdt-bindings: arm: cpus: Add apple,avalanche & blizzard compatibles (diff)
downloadwireguard-linux-93b415b2e164348bf29fb89b77a3d9585bab76a5.tar.xz
wireguard-linux-93b415b2e164348bf29fb89b77a3d9585bab76a5.zip
dt-bindings: interrupt-controller: apple,aic2: Add apple,t8112-aic compatible
The Apple M2 SoC uses AICv2 and is compatible with the existing driver. Add its per-SoC compatible. Since multi-die versions of the M2 are not expected decrease '#interrupt-cells' to 3 for apple,t8112-aic. This is seamlessly handled inside the driver. Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st>
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