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author | 2020-12-26 13:15:55 +0100 | |
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committer | 2021-01-04 11:42:38 +0100 | |
commit | 9e717285f0bd591d716fa0e7418f2cdaf756dd25 (patch) | |
tree | f0d60be441498594158dc639b2d510551ede6fc5 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL (diff) | |
download | wireguard-linux-9e717285f0bd591d716fa0e7418f2cdaf756dd25.tar.xz wireguard-linux-9e717285f0bd591d716fa0e7418f2cdaf756dd25.zip |
clk: meson: clk-pll: make "ret" a signed integer
The error codes returned by meson_clk_get_pll_settings() are all
negative. Make "ret" a signed integer in meson_clk_pll_set_rate() to
make it match with the clk_ops.set_rate API as well as the data type
returned by meson_clk_get_pll_settings().
Fixes: 8eed1db1adec6a ("clk: meson: pll: update driver for the g12a")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201226121556.975418-3-martin.blumenstingl@googlemail.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions