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| author |   Scott K Logan <logans@cottsay.net> | 2020-09-25 01:43:53 -0700 |
|---|---|---|
| committer |   Kevin Hilman <khilman@baylibre.com> | 2020-10-05 10:40:23 -0700 |
| commit | a1afbbb0285797e01313779c71287d936d069245 (patch) | |
| tree | 1b1f653c1645ce49d26fad40bcf1a78b53539e14 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: meson-axg-s400: enable USB OTG (diff) | |
| download | wireguard-linux-a1afbbb0285797e01313779c71287d936d069245.tar.xz wireguard-linux-a1afbbb0285797e01313779c71287d936d069245.zip | |
arm64: dts: meson: add missing g12 rng clock
This adds the missing perpheral clock for the RNG for Amlogic G12. As
stated in amlogic,meson-rng.yaml, this isn't always necessary for the
RNG to function, but is better to have in case the clock is disabled for
some reason prior to loading.
Signed-off-by: Scott K Logan <logans@cottsay.net>
Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/520a1a8ec7a958b3d918d89563ec7e93a4100a45.camel@cottsay.net
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions