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| author |   Niu,Bing <bing.niu@intel.com> | 2015-07-04 00:27:34 +0800 |
|---|---|---|
| committer |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-07-06 14:41:25 +0200 |
| commit | a647828afc7d7d352aeb076dbc03bd952b09b1e3 (patch) | |
| tree | cf1bce314a88267923d8730a918e413962cd755a /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915: Update WaFlushCoherentL3CacheLinesAtContextSwitch (diff) | |
| download | wireguard-linux-a647828afc7d7d352aeb076dbc03bd952b09b1e3.tar.xz wireguard-linux-a647828afc7d7d352aeb076dbc03bd952b09b1e3.zip | |
drm/i915: Also perform gpu reset under execlist mode.
It is found that i915 will not reset gpu under execlist mode when
unload module. that will lead to some issues when unload/load module
with different submission mode. e.g. from execlist mode to ring
buffer mode via loading/unloading i915. Because HW is not in a reset
state and registers are not clean under such condition.
Signed-off-by: Niu,Bing <bing.niu@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions