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| author |   Jagan Teki <jagan@amarulasolutions.com> | 2021-02-28 21:13:23 +0530 |
|---|---|---|
| committer |   Alexandre Torgue <alexandre.torgue@foss.st.com> | 2021-03-11 12:06:23 +0100 |
| commit | adc0496104b64b4e6a75627f8a03cd4dfd3e8bbc (patch) | |
| tree | 821453babf8503f6ab0442c1c3c3818f0819d9db /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit (diff) | |
| download | wireguard-linux-adc0496104b64b4e6a75627f8a03cd4dfd3e8bbc.tar.xz wireguard-linux-adc0496104b64b4e6a75627f8a03cd4dfd3e8bbc.zip | |
ARM: dts: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
i.Core STM32MP1 needs to mount on top of this Evaluation board for
creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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