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| author |   Andrew Jeffery <andrew@aj.id.au> | 2019-12-03 22:34:04 +1030 |
|---|---|---|
| committer |   Joel Stanley <joel@jms.id.au> | 2019-12-17 13:38:03 +1100 |
| commit | b41c03c1cfdec39c68ad04ab79e8583a7b2b363e (patch) | |
| tree | a0190a160e8e9186b929b5f62203178b02d3275f /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: misc: Document reg for aspeed, p2a-ctrl nodes (diff) | |
| download | wireguard-linux-b41c03c1cfdec39c68ad04ab79e8583a7b2b363e.tar.xz wireguard-linux-b41c03c1cfdec39c68ad04ab79e8583a7b2b363e.zip | |
ARM: dts: aspeed-g5: Move EDAC node to APB
Previously the register interface was not attached to any internal bus,
which is not correct - it lives on the APB.
Cc: Stefan M Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Stefan Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions