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authorDmitry Osipenko <digetx@gmail.com>2018-10-21 21:30:49 +0300
committerThierry Reding <treding@nvidia.com>2018-11-08 12:45:07 +0100
commitcd9f69800b2a7a47981c397e008f6040fadc4523 (patch)
treeaf5e887c7a26cae092d2f6c258d8688004846047 /tools/perf/scripts/python/export-to-postgresql.py
parentARM: dts: tegra20: Add interrupt entry to External Memory Controller (diff)
downloadwireguard-linux-cd9f69800b2a7a47981c397e008f6040fadc4523.tar.xz
wireguard-linux-cd9f69800b2a7a47981c397e008f6040fadc4523.zip
ARM: dts: tegra20: Add clock entry to External Memory Controller
Add clock entry into the EMC DT node. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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